Similar articles

Abstract: This paper details on the design of DVB-S2 receivers which is compliant with the broadcasting mode. Special attention is paid to the specific receiver functions necessary to demodulate the received signal. To show the system performance we consider the design of a complete receiver consisting of timing recovery unit, frame synchronization unit, frequency recovery unit and phase recovery unit. The system is easier to hardware implementation comparing with that provided in (ETSI, 2005; Sun et al., 2004). After the performance of the algorithms is analyzed and a quantitative result is given, this allows us to draw conclusions concerning the achievable system performance under realistic complexity assumptions.

[1] Casini, E., de Gaudenzi, R., Ginesi, A., 2004. DVB-S2 modem algorithms design and performance over typical satellite channels. Int. J. Satell. Commun. Network., 22(3):281-318.

[2] D'Andrea, N.A., Luise, M., 1993. Design and analysis of a jittter-free clock recovery scheme for QAM systems. IEEE Trans. Commun., 41(9):1296-1299.

[3] D'Andrea, N.A., Luise, M., 1996. Optimization of symbol timing recovery for QAM data demodulators. IEEE Trans. Commun., 44(3):399-406.

[4] ETSI, 2003. EN300 421 v.1.1.2 Digital Video Broadcasting (DVB): Framing Structure, Channel Coding and Modulation for 11/12 GHz Satellite Services.

[5] ETSI, 2004. EN302 307 v1.1.1 Digital Video Broadcasting (DVB): Second Generation Framing Structure, Channel Coding and Modulation Systems for Broadcasting, Interactive Services, News Gathering and Other Broadband Satellite Application.

[6] ETSI, 2005. TR 102 376 v1.1.1 Digital Video Broadcasting (DVB): User Guidelines for the Second Generation System for Broadcasting, Interactive Services, News Gathering and Other Broadband Satellite Application.

[7] Gardner, F.M., 1986. A BPSK/QPSK timing-error detector for sampled receivers. IEEE Trans. Commun., 34(5):423-429.

[8] Gardner, F.M., 1990. Frequency Detectors for Digital Demodulators via Maximum-likelihood Derivation ESA Final Rep: Part 2, ESTEC Contract 8022/88/NL/DG.

[9] Huang, Z.J., Yi, Z.Q., Zhang, M., Wang, K., 2004. 8PSK Demodulation for New Generation DVB-S2 Communications, Circuits and Systems. ICCCAS 2004, 2(27-29):1447-1450.

[10] Hughes Network Systems, 2003. LDPC Frame Synchronization. DVB-S2-104.

[11] Karam, G., Sari, H., 1995. A reduced-complexity frequency detector derived from the maximum-likelihood principle. IEEE Trans. Commun., 43(10):2641-2650.

[12] Mengali, U., D'Andrea, N.A., 1997. Synchronization Techniques for Digital Receivers. Plenum Press, New York, USA.

[13] Nemer, E., 2005. Physical Layer Impairments in DVB-S2 Receivers. Consumer Communications and Networking Conference, p.487-492.

[14] Sun, F.W., Jiang, Y., Lee, L.N., 2004. Frame synchronization and pilot structure for DVB-S2. Int. J. Satell. Commun. Network., 22(3):319-339.

[15] van der Wal, R., Montreuil, L., 1995. QPSK and BPSK demodulator chip-set for satellite applications. IEEE Transactions on Consumer Electronics, 41(1):30-41.