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Journal of Zhejiang University SCIENCE A 2007 Vol.8 No.1 P.42~49

http://doi.org/10.1631/jzus.2007.A0042


A hardware/software co-optimization approach for embedded software of MP3 decoder


Author(s):  ZHANG Wei, LIU Peng, ZHAI Zhi-bo

Affiliation(s):  Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China

Corresponding email(s):   zhang1wei3@21cn.com, liupeng@isee.zju.edu.cn

Key Words:  Hardware/software co-optimization, DSP, Embedded software, MP3 decoder


ZHANG Wei, LIU Peng, ZHAI Zhi-bo. A hardware/software co-optimization approach for embedded software of MP3 decoder[J]. Journal of Zhejiang University Science A, 2007, 8(1): 42~49.

@article{title="A hardware/software co-optimization approach for embedded software of MP3 decoder",
author="ZHANG Wei, LIU Peng, ZHAI Zhi-bo",
journal="Journal of Zhejiang University Science A",
volume="8",
number="1",
pages="42~49",
year="2007",
publisher="Zhejiang University Press & Springer",
doi="10.1631/jzus.2007.A0042"
}

%0 Journal Article
%T A hardware/software co-optimization approach for embedded software of MP3 decoder
%A ZHANG Wei
%A LIU Peng
%A ZHAI Zhi-bo
%J Journal of Zhejiang University SCIENCE A
%V 8
%N 1
%P 42~49
%@ 1673-565X
%D 2007
%I Zhejiang University Press & Springer
%DOI 10.1631/jzus.2007.A0042

TY - JOUR
T1 - A hardware/software co-optimization approach for embedded software of MP3 decoder
A1 - ZHANG Wei
A1 - LIU Peng
A1 - ZHAI Zhi-bo
J0 - Journal of Zhejiang University Science A
VL - 8
IS - 1
SP - 42
EP - 49
%@ 1673-565X
Y1 - 2007
PB - Zhejiang University Press & Springer
ER -
DOI - 10.1631/jzus.2007.A0042


Abstract: 
In order to improve the efficiency of embedded software running on processor core, this paper proposes a hardware/software co-optimization approach for embedded software from the system point of view. The proposed stepwise methods aim at exploiting the structure and the resources of the processor as much as possible for software algorithm optimization. To achieve low memory usage and low frequency need for the same performance, this co-optimization approach was used to optimize embedded software of MP3 decoder based on a 16-bit fixed-point DSP core. After the optimization, the results of decoding 128 kbps, 44.1 kHz stereo MP3 on DSP evaluation platform need 45.9 MIPS and 20.4 kbytes memory space. The optimization rate achieves 65.6% for memory and 49.6% for frequency respectively compared with the results by compiler using floating-point computation. The experimental result indicates the availability of the hardware/software co-optimization approach depending on the algorithm and architecture.

Darkslateblue:Affiliate; Royal Blue:Author; Turquoise:Article

Reference

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