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On-line Access: 2022-01-24

Received: 2020-09-27

Revision Accepted: 2022-04-22

Crosschecked: 2021-01-07

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Citations:  Bibtex RefMan EndNote GB/T7714

 ORCID:

Yang WANG

https://orcid.org/0000-0003-0363-3412

Xiangliang JIN

https://orcid.org/0000-0002-9732-142X

Yan PENG

https://orcid.org/0000-0003-1312-9527

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Frontiers of Information Technology & Electronic Engineering 

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Design and optimization of a gate-controlled dual direction electro-static discharge device for an industry-level fluorescent optical fiber temperature sensor


Author(s):  Yang WANG, Xiangliang JIN, Jian YANG, Feng YAN, Yujie LIU, Yan PENG, Jun LUO, Jun YANG

Affiliation(s):  School of Physics and Electronics, Hunan Normal University, Changsha 410081, China; more

Corresponding email(s):  jinxl@hunnu.edu.cn, pengyan@shu.edu.cn

Key Words:  Electric breakdown; Semiconductor device reliability; CMOS technology


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Yang WANG, Xiangliang JIN, Jian YANG, Feng YAN, Yujie LIU, Yan PENG, Jun LUO, Jun YANG. Design and optimization of a gate-controlled dual direction electro-static discharge device for an industry-level fluorescent optical fiber temperature sensor[J]. Frontiers of Information Technology & Electronic Engineering,in press.https://doi.org/10.1631/FITEE.2000504

@article{title="Design and optimization of a gate-controlled dual direction electro-static discharge device for an industry-level fluorescent optical fiber temperature sensor",
author="Yang WANG, Xiangliang JIN, Jian YANG, Feng YAN, Yujie LIU, Yan PENG, Jun LUO, Jun YANG",
journal="Frontiers of Information Technology & Electronic Engineering",
year="in press",
publisher="Zhejiang University Press & Springer",
doi="https://doi.org/10.1631/FITEE.2000504"
}

%0 Journal Article
%T Design and optimization of a gate-controlled dual direction electro-static discharge device for an industry-level fluorescent optical fiber temperature sensor
%A Yang WANG
%A Xiangliang JIN
%A Jian YANG
%A Feng YAN
%A Yujie LIU
%A Yan PENG
%A Jun LUO
%A Jun YANG
%J Frontiers of Information Technology & Electronic Engineering
%P 158-170
%@ 2095-9184
%D in press
%I Zhejiang University Press & Springer
doi="https://doi.org/10.1631/FITEE.2000504"

TY - JOUR
T1 - Design and optimization of a gate-controlled dual direction electro-static discharge device for an industry-level fluorescent optical fiber temperature sensor
A1 - Yang WANG
A1 - Xiangliang JIN
A1 - Jian YANG
A1 - Feng YAN
A1 - Yujie LIU
A1 - Yan PENG
A1 - Jun LUO
A1 - Jun YANG
J0 - Frontiers of Information Technology & Electronic Engineering
SP - 158
EP - 170
%@ 2095-9184
Y1 - in press
PB - Zhejiang University Press & Springer
ER -
doi="https://doi.org/10.1631/FITEE.2000504"


Abstract: 
The input/output (I/O) pins of an industry-level fluorescent optical fiber temperature sensor readout circuit need on-chip integrated high-performance electro-static discharge (ESD) protection devices. It is difficult for the failure level of basic N-type buried layer gate-controlled silicon controlled rectifier (NBL-GCSCR) manufactured by the 0.18 μm standard bipolar- CMOS-DMOS (BCD) process to meet this need. Therefore, we propose an on-chip integrated novel deep N-well gate-controlled SCR (DNW-GCSCR) with a high failure level to effectively solve the problems based on the same semiconductor process. Technology computer-aided design (TCAD) simulation is used to analyze the device characteristics. SCRs are tested by transmission line pulses (TLP) to obtain accurate ESD parameters. The holding voltage (24.03 V) of NBL-GCSCR with the longitudinal bipolar junction transistor (BJT) path is significantly higher than the holding voltage (5.15 V) of DNW-GCSCR with the lateral SCR path of the same size. However, the failure current of the NBL-GCSCR device is 1.71 A, and the failure current of the DNW-GCSCR device is 20.99 A. When the gate size of DNW-GCSCR is increased from 2 μm to 6 μm, the holding voltage is increased from 3.50 V to 8.38 V. The optimized DNW-GCSCR (6 μm) can be stably applied on target readout circuits for on-chip electrostatic discharge protection.

一种用于工业级荧光光纤温度传感器的栅控双向静电放电器件的设计与优化

汪洋1,金湘亮1,杨健1,严峰1,刘煜杰1,彭艳2,罗均2,杨军3
1湖南师范大学物理与电子科学学院,中国长沙市,410081
2上海大学机电工程与自动化学院,中国上海市,200444
3西安大略大学工程学院,加拿大安大略省伦敦市,N6A3K7
摘要:工业级荧光光纤温度传感器读出电路的I/O引脚需要片上集成高性能静电放电(ESD)保护器件。采用0.18 µm标准BCD工艺制造的基本N型埋层栅控可控硅(NBL-GCSCR)失效等级难以满足需求。因此,基于相同半导体工艺,提出片上集成新型高失效等级深N阱栅控可控硅(DNW-GCSCR)以有效解决上述问题。采用技术计算机辅助设计(TCAD)仿真分析器件特性。可控硅通过传输线脉冲(TLP)进行测试,以获得准确ESD参数。具有纵向双极晶体管(BJT)路径的NBL-GCSCR维持电压(24.03 V)明显高于具有相同尺寸横向可控硅路径的DNW-GCSCR维持电压(5.15 V)。NBL-GCSCR器件的失效电流为1.71 A,DNW-GCSCR器件的失效电流为20.99 A。当DNW-GCSCR栅极尺寸从2 µm增加到6 µm时,维持电压为从3.50 V增加到8.38 V。优化后的DNW-GCSCR(栅极尺寸6 µm)可以稳定应用于目标读出电路的片上静电放电保护。

关键词组:静电击穿;半导体器件可靠性;CMOS工艺

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