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CLC number: TN911

On-line Access: 2015-06-04

Received: 2014-07-24

Revision Accepted: 2014-09-25

Crosschecked: 2015-05-07

Cited: 2

Clicked: 2813

Citations:  Bibtex RefMan EndNote GB/T7714

 ORCID:

Michaelraj Kingston Roberts

http://orcid.org/0000-0002-1484-703X

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Frontiers of Information Technology & Electronic Engineering  2015 Vol.16 No.6 P.511-518

http://doi.org/10.1631/FITEE.1400269


An improved low-complexity sum-product decoding algorithm for low-density parity-check codes


Author(s):  Michaelraj Kingston Roberts, Ramesh Jayabalan

Affiliation(s):  Department of Electronics and Communication Engineering, PSG College of Technology, Coimbatore 641004, India

Corresponding email(s):   king.pane@gmail.com

Key Words:  Computational complexity, Coding gain, Fast Fourier transform (FFT), Low-density parity-check (LDPC) codes, Sum-product algorithm (SPA)


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Michaelraj Kingston Roberts, Ramesh Jayabalan. An improved low-complexity sum-product decoding algorithm for low-density parity-check codes[J]. Frontiers of Information Technology & Electronic Engineering, 2015, 16(6): 511-518.

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Abstract: 
In this paper, an improved low-complexity sum-product decoding algorithm is presented for low-density parity-check (LDPC) codes. In the proposed algorithm, reduction in computational complexity is achieved by utilizing fast Fourier transform (FFT) with time shift in the check node process. The improvement in the decoding performance is achieved by utilizing an optimized integer constant in the variable node process. Simulation results show that the proposed algorithm achieves an overall coding gain improvement ranging from 0.04 to 0.46 dB. Moreover, when compared with the sum-product algorithm (SPA), the proposed decoding algorithm can achieve a reduction of 42%–67% of the total number of arithmetic operations required for the decoding process.

The authors have proposed an interesting modification to the LDPC decoding algorithm to reduce the implementation complexity. Overall the paper is well written and structured.

一种改进的用于低密度奇偶校验码的低复杂度和积译码

目的:为减少校验节点过程总计算量,对低密度奇偶校验译码提出低复杂度的和积译码算法。
创新点:降低和积译码计算复杂度的同时不损失译码性能。
方法:在校验节点过程中使用时移快速傅里叶变换降低计算复杂度;在变量节点过程中使用优化后的常整数提升译码性能。所提算法性能在Wi-MAX和WLAN中的标准低密度奇偶校验码上测试并验证,且与SPA、SSPA和MSPA进行性能比较(图1-3)。
结论:仿真结果表明,整体上所述算法对编码增益的提高值在0.04到0.46 dB之间;与和积算法(SPA)相比,所述算法可以降低译码过程所需42%-67%的全部代数运算操作。

关键词:计算复杂度;编码增益;快速傅里叶变换;低密度奇偶校验码;和积算法(SPA)

Darkslateblue:Affiliate; Royal Blue:Author; Turquoise:Article

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Open peer comments: Debate/Discuss/Question/Opinion

<1>

Stylianos Papaharalabos@National Observatory of Athens, Greece<spapaha@noa.gr>

2015-06-10 15:11:25

Very interesting paper. It would be useful in future research works in this field. I am not aware thought, if this idea has been published already by the same or other authors in any of IEEE journals.

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