CLC number:
On-line Access: 2022-01-24
Received: 2020-07-06
Revision Accepted: 2022-04-22
Crosschecked: 2020-12-22
Cited: 0
Clicked: 6145
Citations: Bibtex RefMan EndNote GB/T7714
Mengni BIE, Wei LI, Tao CHEN, Longmei NAN, Danyang YANG. An energy-efficient reconfigurable asymmetric modular cryptographic operation unit for RSA and ECC[J]. Frontiers of Information Technology & Electronic Engineering, 2022, 23(1): 134-144.
@article{title="An energy-efficient reconfigurable asymmetric modular cryptographic operation unit for RSA and ECC",
author="Mengni BIE, Wei LI, Tao CHEN, Longmei NAN, Danyang YANG",
journal="Frontiers of Information Technology & Electronic Engineering",
volume="23",
number="1",
pages="134-144",
year="2022",
publisher="Zhejiang University Press & Springer",
doi="10.1631/FITEE.2000325"
}
%0 Journal Article
%T An energy-efficient reconfigurable asymmetric modular cryptographic operation unit for RSA and ECC
%A Mengni BIE
%A Wei LI
%A Tao CHEN
%A Longmei NAN
%A Danyang YANG
%J Frontiers of Information Technology & Electronic Engineering
%V 23
%N 1
%P 134-144
%@ 2095-9184
%D 2022
%I Zhejiang University Press & Springer
%DOI 10.1631/FITEE.2000325
TY - JOUR
T1 - An energy-efficient reconfigurable asymmetric modular cryptographic operation unit for RSA and ECC
A1 - Mengni BIE
A1 - Wei LI
A1 - Tao CHEN
A1 - Longmei NAN
A1 - Danyang YANG
J0 - Frontiers of Information Technology & Electronic Engineering
VL - 23
IS - 1
SP - 134
EP - 144
%@ 2095-9184
Y1 - 2022
PB - Zhejiang University Press & Springer
ER -
DOI - 10.1631/FITEE.2000325
Abstract: RSA and ellipse curve cryptography (ECC) algorithms are widely used in authentication, data security, and access control. In this paper, we analyze the basic operation of the ECC and RSA algorithms and optimize their modular multiplication and modular inversion algorithms. We then propose a reconfigurable modular operation architecture, with a mix-memory unit and double multiply-accumulate structures, to realize our unified, asymmetric cryptosystem structure in an operational unit. Synthesized with 55-nm CMOS process, our design runs at 588 MHz and requires only 437 801 μm2 of hardware resources. Our proposed design takes 21.92 and 23.36 mW for 2048-bit RSA modular multiplication and modular inversion respectively, as well as 16.16 and 15.88 mW to complete 512-bit ECC dual-field modular multiplication and modular inversion respectively. It is more energy-efficient and flexible than existing single algorithm units. Compared with existing multiple algorithm units, our proposed method shows better performance. The operation unit is embedded in a 64-bit RISC-V processor, realizing key generation, encryption and decryption, and digital signature functions of both RSA and ECC. Our proposed design takes 0.224 and 0.153 ms for 256-bit ECC point multiplication in
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