
| index | Title |
| 1 | A BCH error correction scheme applied to FPGA with embedded memory Author(s):Yang Liu, Jie Li, Han Wang, Debiao... Clicked:8356 Download:11030 Cited:0 <Full Text> <PPT> 2488 Frontiers of Information Technology & Electronic Engineering 2021 Vol.22 No.8 P.1127-1139 DOI:10.1631/FITEE.2000323 |
| 2 | GC bypass: decoupling GC from the flash translation layer to eliminate GC-induced long-tail latency inside ... Author(s):Shiqiang NIE, Jie NIU, Yingzhao SH... Clicked:376 Download:302 Cited:0 <Full Text> <PPT> 219 Journal of Zhejiang University Science 2026 Vol.27 No.2 P.1-16 DOI:10.1631/ENG.ITEE.2025.0152 |