| index | Title |
| 1 | Design of a novel RTD-based three-variable universal logic gate Author(s):Mao-qun Yao, Kai Yang, Cong-yuan X... Clicked:10066 Download:4659 Cited:1 <Full Text> <PPT> 2661 Frontiers of Information Technology & Electronic Engineering 2015 Vol.16 No.8 P.694-699 DOI:10.1631/FITEE.1500102 |
| 2 | Power-efficient dual-edge implicit pulse-triggered flip-flop with an embedded clock-gating scheme Author(s):Liang Geng , Ji-Zhong Shen , Cong-... Clicked:8724 Download:5237 Cited:0 <Full Text> <PPT> 2655 Frontiers of Information Technology & Electronic Engineering 2016 Vol.17 No.9 P.962-972 DOI:10.1631/FITEE.1500293 |
| 3 | Function synthesis algorithm based on RTD-based three-variable universal logic gates Author(s):Mao-qun Yao, Kai Yang, Ji-zhong Sh... Clicked:9802 Download:4147 Cited:0 <Full Text> <PPT> 2811 Frontiers of Information Technology & Electronic Engineering 2017 Vol.18 No.10 P.1654-1664 DOI:10.1631/FITEE.1601730 |