JZUS - Journal of Zhejiang University SCIENCE

Journal of Zhejiang University SCIENCE A 2009 Vol.10 No.2 P.301-310

http://doi.org/10.1631/jzus.A0820024

High-performance hardware architecture of elliptic curve cryptography processor over GF(2¹⁶³)

Author(s): Yong-ping DAN, Xue-cheng ZOU, Zheng-lin LIU, Yu HAN, Li-hua YI
Affiliation(s): Department of Electronic Science and Technology, Huazhong University of Science and Technology, Wuhan 430074, China
Corresponding email(s): dyphhl@gmail.com
Key Words: Elliptic curve cryptography (ECC), Scalar multiplication, Hardware implementation

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Abstract: We propose a novel high-performance hardware architecture of processor for elliptic curve scalar multiplication based on the Lopez-Dahab algorithm over GF(2¹⁶³) in polynomial basis representation. The processor can do all the operations using an efficient modular arithmetic logic unit, which includes an addition unit, a square and a carefully designed multiplication unit. In the proposed architecture, multiplication, addition, and square can be performed in parallel by the decomposition of computation. The point addition and point doubling iteration operations can be performed in six multiplications by optimization and solution of data dependency. The implementation results based on Xilinx VirtexII XC2V6000 FPGA show that the proposed design can do random elliptic curve scalar multiplication GF(2¹⁶³) in 34.11 μs, occupying 2821 registers and 13 376 LUTs.

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