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Received: 2008-01-13
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High-performance hardware architecture of elliptic curve cryptography processor over GF(2163)
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Yong-ping DAN, Xue-cheng ZOU, Zheng-lin LIU, Yu HAN, Li-hua YI. High-performance hardware architecture of elliptic curve cryptography processor over GF(2163)[J]. Journal of Zhejiang University Science A, 2009, 10(2): 301-310.
@article{title="High-performance hardware architecture of elliptic curve cryptography processor over GF(2163)",
author="Yong-ping DAN, Xue-cheng ZOU, Zheng-lin LIU, Yu HAN, Li-hua YI",
journal="Journal of Zhejiang University Science A",
volume="10",
number="2",
pages="301-310",
year="2009",
publisher="Zhejiang University Press & Springer",
doi="10.1631/jzus.A0820024"
}
%0 Journal Article
%T High-performance hardware architecture of elliptic curve cryptography processor over GF(2163)
%A Yong-ping DAN
%A Xue-cheng ZOU
%A Zheng-lin LIU
%A Yu HAN
%A Li-hua YI
%J Journal of Zhejiang University SCIENCE A
%V 10
%N 2
%P 301-310
%@ 1673-565X
%D 2009
%I Zhejiang University Press & Springer
%DOI 10.1631/jzus.A0820024
TY - JOUR
T1 - High-performance hardware architecture of elliptic curve cryptography processor over GF(2163)
A1 - Yong-ping DAN
A1 - Xue-cheng ZOU
A1 - Zheng-lin LIU
A1 - Yu HAN
A1 - Li-hua YI
J0 - Journal of Zhejiang University Science A
VL - 10
IS - 2
SP - 301
EP - 310
%@ 1673-565X
Y1 - 2009
PB - Zhejiang University Press & Springer
ER -
DOI - 10.1631/jzus.A0820024
Abstract: We propose a novel high-performance hardware architecture of processor for elliptic curve scalar multiplication based on the Lopez-Dahab algorithm over GF(2163) in polynomial basis representation. The processor can do all the operations using an efficient modular arithmetic logic unit, which includes an addition unit, a square and a carefully designed multiplication unit. In the proposed architecture, multiplication, addition, and square can be performed in parallel by the decomposition of computation. The point addition and point doubling iteration operations can be performed in six multiplications by optimization and solution of data dependency. The implementation results based on Xilinx VirtexII XC2V6000 FPGA show that the proposed design can do random elliptic curve scalar multiplication GF(2163) in 34.11 μs, occupying 2821 registers and 13 376 LUTs.
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