CLC number: TN432
On-line Access: 2017-05-24
Received: 2015-11-15
Revision Accepted: 2016-03-02
Crosschecked: 2017-04-27
Cited: 0
Clicked: 12185
Jun-sheng Lv, You Li, Yu-mei Zhou, Jian-zhong Zhao, Hai-hua Shen, Feng Zhang. Wide-range tracking technique for process-variation-robust clock and data recovery applications[J]. Frontiers of Information Technology & Electronic Engineering, 2017, 18(5): 729-737.
@article{title="Wide-range tracking technique for process-variation-robust clock and data recovery applications",
author="Jun-sheng Lv, You Li, Yu-mei Zhou, Jian-zhong Zhao, Hai-hua Shen, Feng Zhang",
journal="Frontiers of Information Technology & Electronic Engineering",
volume="18",
number="5",
pages="729-737",
year="2017",
publisher="Zhejiang University Press & Springer",
doi="10.1631/FITEE.1500410"
}
%0 Journal Article
%T Wide-range tracking technique for process-variation-robust clock and data recovery applications
%A Jun-sheng Lv
%A You Li
%A Yu-mei Zhou
%A Jian-zhong Zhao
%A Hai-hua Shen
%A Feng Zhang
%J Frontiers of Information Technology & Electronic Engineering
%V 18
%N 5
%P 729-737
%@ 2095-9184
%D 2017
%I Zhejiang University Press & Springer
%DOI 10.1631/FITEE.1500410
TY - JOUR
T1 - Wide-range tracking technique for process-variation-robust clock and data recovery applications
A1 - Jun-sheng Lv
A1 - You Li
A1 - Yu-mei Zhou
A1 - Jian-zhong Zhao
A1 - Hai-hua Shen
A1 - Feng Zhang
J0 - Frontiers of Information Technology & Electronic Engineering
VL - 18
IS - 5
SP - 729
EP - 737
%@ 2095-9184
Y1 - 2017
PB - Zhejiang University Press & Springer
ER -
DOI - 10.1631/FITEE.1500410
Abstract: A wide-range tracking technique for clock and data recovery (CDR) circuit is presented. Compared to the traditional technique, a digital CDR controller with calibration is adopted to extend the tracking range. Because of the use of digital circuits in the design, CDR is not sensitive to process and power supply variations. To verify the technique, the whole CDR circuit is implemented using 65-nm CMOS technology. Measurements show that the tracking range of CDR is greater than ±6×10−3 at 5 Gb/s. The receiver has good jitter tolerance performance and achieves a bit error rate of <10–12. The re-timed and re-multiplexed serial data has a root-mean-square jitter of 6.7 ps.
The manuscript proposed a wide range tracking technique for clock data recovery (CDR) circuit. Due to digital CDR controller with calibration, the tracking range was extended. Moreover, the testing results have verified the design technology. This paper is well structured and the presentation is clear.
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