[1] AVS (Audio Video Coding Standard Workgroup of China), 2003. Video Coding Standard FCD1.0.

[2] Chen, T.C., Huang, Y.W., Chen, L.G., 2004. Fully Utilized and Reusable Architecture for Fractional Motion Estimation of H.264/AVC. Proc. IEEE ICASSP, 5:9-12.

[3] Deng, L., Gao, W., Hu, M.Z., Ji, Z.Z., 2004. An Efficient VLSI Implementation for MC Interpolation of AVS Standard. Advances in Multimedia Information Processing, p.200-206.

[4] Horowitz, M., Joch, A., Kossentini, F., Hallapuro, A., 2003. H.264/AVC baseline profile decoder complexity analysis. IEEE Trans. on Circuits Syst. Video Technol., 13(7):704-716.

[5] Li, Y., Qu, Y.M., He, Y., 2007. Memory Cache Based Motion Compensation Architecture for HDTV H.264/AVC Decoder. IEEE Int. Symp. on Circuits and Systems, p.2906-2909.

[6] Ling, N., Wang, N.T., 2003. A real-time video decoder for digital HDTV. J. VLSI Signal Processing, 33(3):295-306.

[7] Mizosoe, H., Yoshida, D., Nakamura, T., 2007. A single chip H.264/AVC HDTV encoder/decoder/transcoder system LSI. IEEE Trans. on Consum. Electron., 53(2):630-635.

[8] Song, Y., Liu, Z.Y., Goto, S., Ikenaga, T., 2005. A VLSI Architecture for Motion Compensation Interpolation in H.264/AVC. 6th Int. Conf. on ASIC, 1:279-282.

[9] Tsai, C.Y., Chen, T.C., Chen, T.W., Chen, L.G., 2005. Bandwidth Optimized Motion Compensation Hardware Design for H.264/AVC HDTV Decoder. 48th Midwest Symp. on Circuits and Systems, 2:1199-1202.

[10] Wang, R.G., Huang, C., Li, J.T., Shen, Y.F., 2004. Sub-pixel Motion Compensation Interpolation Filter in AVS. IEEE Int. Conf. on Multimedia and Expo, 1:93-96.

[11] Wang, S.Z., Lin, T.A., Liu, T.M., Lee, C.Y., 2005. A New Motion Compensation Design for H.264/AVC Decoder. Proc. IEEE Int. Symp. on Circuits and Systems, 5:4558-4561.

[12] Zheng, J.H., Deng, L., Zhang, P., Xie, D., 2006. An efficient VLSI architecture for motion compensation of AVS HDTV decoder. J. Comput. Sci. Technol., 21(3):370-377.