| index | Title |
| 1 | The EB-ANUBAD translator: A hybrid scheme Author(s):SAHA Goutam Kumar Clicked:7604 Download:4082 Cited:0 <Full Text> Journal of Zhejiang University Science A 2005 Vol.6 No.10 P.1047-1050 DOI:10.1631/jzus.2005.A1047 |
| 2 | Co-design for an SoC embedded network controller Author(s):Zou Lian-ying, Zou Xue-cheng Clicked:6934 Download:4002 Cited:0 <Full Text> Journal of Zhejiang University Science A 2006 Vol.7 No.4 P.591-596 DOI:10.1631/jzus.2006.A0591 |
| 3 | A hardware/software co-optimization approach for embedded software of MP3 decoder Author(s):ZHANG Wei, LIU Peng, ZHAI Zhi-bo Clicked:7682 Download:4037 Cited:1 <Full Text> Journal of Zhejiang University Science A 2007 Vol.8 No.1 P.42-49 DOI:10.1631/jzus.2007.A0042 |
| 4 | High-performance hardware architecture of elliptic curve cryptography processor over GF(2163) Author(s):Yong-ping DAN, Xue-cheng ZOU, Zheng-lin LIU, Yu HAN, Li-hua YI Clicked:7429 Download:4552 Cited:5 <Full Text> Journal of Zhejiang University Science A 2009 Vol.10 No.2 P.301-310 DOI:10.1631/jzus.A0820024 |
| 5 | A parallel memory architecture for video coding Author(s):Jian-ying PENG, Xiao-lang YAN, De-xian LI, Li-zhong CHEN Clicked:7572 Download:4600 Cited:0 <Full Text> Journal of Zhejiang University Science A 2008 Vol.9 No.12 P.1644-1655 DOI:10.1631/jzus.A0820052 |
| 6 | Gradual refinement for application-specific MPSoC design from Simulink model to RTL implementation Author(s):Kai HUANG, Xiao-lang YAN, Sang-il HAN, Soo-ik CHAE, Ahmed A. JERRAYA, Katalin POPOVICI, Xavier GUERIN, Lisane BRISOLARA, Luigi CARRO Clicked:7737 Download:4964 Cited:3 <Full Text> Journal of Zhejiang University Science A 2009 Vol.10 No.2 P.151-164 DOI:10.1631/jzus.A0820085 |
| 7 | A low-power and low-energy flexible GF(p) elliptic-curve cryptography processor Author(s):Hamid Reza Ahmadi, Ali Afzali-Kusha Clicked:10320 Download:4014 Cited:8 <Full Text> Journal of Zhejiang University Science C 2010 Vol.11 No.9 P.724-736 DOI:10.1631/jzus.C0910660 |
| 8 | An efficient radix-2 fast Fourier transform processor with ganged butterfly engines on field programmable gate arrays Author(s):Zhen-guo Ma, Feng Yu, Rui-feng Ge, Ze-ke Wang Clicked:12433 Download:4184 Cited:1 <Full Text> Journal of Zhejiang University Science C 2011 Vol.12 No.4 P.323-329 DOI:10.1631/jzus.C1000258 |
| 9 | A power-aware code-compression design for RISC/VLIW architecture Author(s):Che-Wei Lin, Chang Hong Lin, Wei Jhih Wang Clicked:9285 Download:3887 Cited:1 <Full Text> Journal of Zhejiang University Science C 2011 Vol.12 No.8 P.629-637 DOI:10.1631/jzus.C1000321 |
| 10 | A novel 3780-point FFT processor scheme for the time domain synchronous OFDM system Author(s):Ji-nan Leng, Lei Xie, Hui-fang Chen, Kuang Wang Clicked:9451 Download:4970 Cited:4 <Full Text> Journal of Zhejiang University Science C 2011 Vol.12 No.12 P.1021-1030 DOI:10.1631/jzus.C1100071 |
| 11 | Implementation and evaluation of parallel FFT on Engineering and Scientific Computation Accelerator (ESCA) architecture Author(s):Dan Wu, Xue-cheng Zou, Kui Dai, Jin-li Rao, Pan Chen, Zhao-xia Zheng Clicked:10924 Download:5523 Cited:2 <Full Text> Journal of Zhejiang University Science C 2011 Vol.12 No.12 P.976-989 DOI:10.1631/jzus.C1100027 |
| 12 | A vision of post-exascale programming Author(s):Ji-dong Zhai, Wen-guang Chen Clicked:5574 Download:4165 Cited:0 <Full Text> <PPT> 2322 Frontiers of Information Technology & Electronic Engineering 2018 Vol.19 No.10 P.1261-1266 DOI:10.1631/FITEE.1800442 |
| 13 | Exploring high-performance processor architecture beyond the exascale Author(s):Xiang-hui Xie, Xun Jia Clicked:6806 Download:4305 Cited:0 <Full Text> <PPT> 2527 Frontiers of Information Technology & Electronic Engineering 2018 Vol.19 No.10 P.1224-1229 DOI:10.1631/FITEE.1800424 |
| 14 | Networking and communication challenges for post-exascale systems Author(s):Dhabaleswar Panda, Xiao-yi Lu, Hari Subramon Clicked:6235 Download:5283 Cited:0 <Full Text> Frontiers of Information Technology & Electronic Engineering 2018 Vol.19 No.10 P.1230-1235 DOI:10.1631/FITEE.1800631 |
| 15 | An energy-efficient reconfigurable asymmetric modular cryptographic operation unit for RSA and ECC Author(s):Mengni BIE, Wei LI, Tao CHEN, Longmei NAN, Danyang YANG Clicked:9765 Download:11328 Cited:0 <Full Text> <PPT> 1768 Frontiers of Information Technology & Electronic Engineering 2022 Vol.23 No.1 P.134-144 DOI:10.1631/FITEE.2000325 |
